openhwgroup
openhwgroup's tracked open-source repos, sorted by stars.
- #1
The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.
★ 3,090+3Star change over the last 7 days - #2
CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
★ 1,282+4Star change over the last 7 days - #3
Functional verification project for the CORE-V family of RISC-V cores.
★ 716+2Star change over the last 7 days - #4
Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
★ 632+0Star change over the last 7 days - #5
CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional caches, BP, FPU, VM/MMU, AHB, RAMs, and peripherals.
★ 614+4Star change over the last 7 days
