verilog

RISC-V XV6/Linux SoC, marchID: 0x2b, 0x34

Veryl: A Modern Hardware Description Language

:seedling: Open source ecosystem for open FPGA boards

SCR1 is a high-quality open-source RISC-V MCU core in Verilog

An FPGA-based USB 1.1 (full-speed) device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB 1.1 (full-speed) device端控制器，可实现USB串口、USB摄像头、USB音频、U盘、USB键盘等设备，只需要3个FPGA普通IO，而不需要额外的接口芯片。

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware

一步一步写MIPS CPU

VHDL compiler and simulator

This project will compile verilog (a hardware description language) into factorio blueprints.

The OpenPiton Platform

An abstraction library for interfacing EDA tools

Z80 open-source silicon clone. Goal is to become a silicon proven, pin compatible, open-source replacement for classic Z80.

Project F brings FPGAs to life with exciting open-source designs you can build on.

SystemVerilog to Verilog conversion

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/

A High-performance Timing Analysis Tool for VLSI Systems

The last Pcileech DMA CFW guide you will ever need. Sponsored by DMAPolice.com

A List of Free and Open Source Hardware Verification Tools and Frameworks

mor1kx - an OpenRISC 1000 processor IP core

SystemVerilog language server

The journey of designing an ASIC (application specific integrated circuit) is long and involves a number of major steps – moving from a concept to specification to tape-outs. Although the end product is typically quite small (measured in nanometers), this long journey is interesting and filled with many engineering challenges.

Low cost microcontroller + FPGA board for makers , hobbyist and student for endless possibility.