verilog

Digital logic design tool and simulator

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software

Chisel: A Modern Hardware Design Language

Verilator open-source SystemVerilog simulator and lint system

A FPGA friendly 32 bit RISC-V CPU implementation

OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

cocotb: Python-based chip (RTL) verification

🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

GPGPU microprocessor architecture

Scala based HDL

Must-have verilog systemverilog modules

HDL libraries and projects

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

:snowflake: Visual editor for open FPGA boards

The Ultra-Low Power RISC-V Core

SERV - The SErial RISC-V CPU

XLS: Accelerated HW Synthesis

Haskell to VHDL/Verilog/SystemVerilog compiler

A small, light weight, RISC CPU soft core

Package manager and build abstraction tool for FPGA/ASIC development

PlatformIO IDE for VSCode: The next generation integrated development environment for IoT

OpenSource GPU, in Verilog, loosely based on RISC-V ISA

Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek security and privacy, nothing is private in our codebase. Our door is wide open for backdoor scrutiny, be it related to RTL, embedded, build, bitstream or any other aspect of design and delivery package. Bujrum!

Verilog to Routing -- Open Source CAD Flow for FPGA Research

Modular hardware build system

Hardware Description Languages

A repository of gate-level simulators and tools for the original Game Boy.

Source and Documentation files for USB C Industrial Camera Project, This repo contains PCB boards, FPGA , Camera and USB along with FPGA Firmware and USB Controller Firmware source.

SystemVerilog compiler and language services