fpga
Tracked open-source repos tagged fpga, sorted by stars.
Related topics
Topics that frequently appear alongside fpga on the same repo.
Recent risers
Repos created in the last 90 days, tagged fpga.
No new repos tagged with this topic in the last 90 days.
- #1
John the Ripper jumbo - advanced offline password cracker, which supports hundreds of hash and cipher types, and runs on many operating systems, CPUs, GPUs, and even some FPGAs
★ 13,584+20Star change over the last 7 days - #2
Digital logic design tool and simulator
★ 7,517+21Star change over the last 7 days - #3
PaddlePaddle High Performance Deep Learning Inference Engine for Mobile and Edge (飞桨高性能深度学习端侧推理引擎)
★ 7,272+0Star change over the last 7 days - #4★ 4,779+3Star change over the last 7 days
- #5★ 4,068+4Star change over the last 7 days
- #6★ 3,239+7Star change over the last 7 days
- #7
The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.
★ 3,090+3Star change over the last 7 days - #8★ 2,602+1Star change over the last 7 days
- #9★ 2,446+7Star change over the last 7 days
- #10
🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
★ 2,249+4Star change over the last 7 days - #11
GPGPU microprocessor architecture
★ 2,220+1Star change over the last 7 days - #12★ 2,205+3Star change over the last 7 days
- #13★ 2,121+5Star change over the last 7 days
- #14★ 2,078+4Star change over the last 7 days
- #15★ 2,032+1Star change over the last 7 days
- #16
Must-have verilog systemverilog modules
★ 2,017+2Star change over the last 7 days - #17★ 2,002+1Star change over the last 7 days
- #18★ 1,924+0Star change over the last 7 days
- #19
The Ultra-Low Power RISC-V Core
★ 1,906+1Star change over the last 7 days - #20★ 1,878+2Star change over the last 7 days
- #21
Universal utility for programming FPGA
★ 1,720+2Star change over the last 7 days - #22
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
★ 1,677+9Star change over the last 7 days - #23
Haskell to VHDL/Verilog/SystemVerilog compiler
★ 1,609+1Star change over the last 7 days - #24
Vitis In-Depth Tutorials
★ 1,608+1Star change over the last 7 days - #25★ 1,579+2Star change over the last 7 days
- #26★ 1,568+1Star change over the last 7 days
- #27★ 1,453+0Star change over the last 7 days
- #28
PlatformIO IDE for VSCode: The next generation integrated development environment for IoT
★ 1,448+1Star change over the last 7 days - #29
Silice is an easy-to-learn, powerful hardware description language, that simplifies designing hardware algorithms with parallelism and pipelines.
★ 1,430+0Star change over the last 7 days - #30
Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek security and privacy, nothing is private in our codebase. Our door is wide open for backdoor scrutiny, be it related to RTL, embedded, build, bitstream or any other aspect of design and delivery package. Bujrum!
★ 1,356+1Star change over the last 7 days